1. Field of the Invention
The present invention relates to a driving circuit for driving active matrix displays. More particularly, the present invention relates to a data driving circuit that applies a data signal to an electroluminescent display. The present invention also relates to an electroluminescent display.
2. Discussion of the Related Art
Active matrix displays, such as an electroluminescent display, may include a pixel array arranged in the form of a matrix composed of cross points between the data lines and the scan lines, i.e., a matrix pixel unit. That is, the data lines may constitute vertical lines (i.e., column lines) of the matrix pixel unit and the scan lines may constitute horizontal lines (i.e., row lines) of the matrix pixel unit. The data driving circuit may supply data signals into the matrix pixel unit at a predetermined time.
FIG. 1 illustrates a block diagram of an exemplary configuration of a data driving circuit. Referring to FIG. 1, a data driving circuit may include a shift register 10, a latch unit 20 and a D/A converter 30.
The shift register 10 may receive a start pulse (/CLK) and a clock (CLK) signal to generate a plurality of shift signals. The shift signals may be generated sequentially and transmitted to a latch unit 20. The latch unit 20 may receive data signals, e.g., video data, and the shift signals. A sampling latch may receive the data signals in series and may output the shift signals in parallel. Accordingly, a row of data signals may be simultaneously applied to a row of pixel units (not illustrated).
The D/A converter unit 30 may convert data signals, output as digital data signals from the latch unit 20, into analog data signals. The D/A converter unit 30 then may output the analog data signals to a pixel unit (not illustrated). The digital data signals converted into the analog data signals may be used to display colors according to a grey level ratio.
FIG. 2 illustrates a schematic of an exemplary configuration of a shift register, which may be used in the data driving circuit illustrated in FIG. 1.
Referring to FIG. 2, the shift register may use a master-slave flip/flop arrangement. In an exemplary operation, the shift register may receive and output signals when the clock is at a low level. Otherwise, the shift register may not output signals when the clock is at a high level.
In this exemplary circuit, a problem may exist because the inverters may output a static current when its input is at a low level. Also, the static current may be generated in half of the inverters inside the flip/flop. Therefore, the overall power consumption of the circuit may be increased since the number of inverters receiving a high-level input in the flip/flop may be the same as the number of inverters receiving a low level input.
A high level output voltage may be calculated by accounting for the voltage and a resistance that may exist between a supply voltage potential and ground, and the low level output voltage may be higher than a threshold voltage of a transistor, as illustrated in FIG. 2. In other words, the high level input voltage received at every stage may vary according to property deviations of the transistors. Therefore, the circuit may operate erroneously due to these level variations generated at the high level. Also, a low-level deviation of the output voltage may be represented by an ON resistance deviation of input transistors in the inverters illustrated in the circuit of FIG. 2, which may increase a high-level deviation of the input voltage. Transistors, for example, that may be employed in an electroluminescent display may make the above problems even worse due to the substantial property deviations that may exist.
Additionally, an inverter may charge an output port by allowing a current to flow through an input transistor to the output port. The output port may discharge by allowing a current to flow from the output port to a load transistor. Accordingly, a source-gate voltage of the load transistor may be gradually reduced when the output port is being charged. Therefore, the discharge current may fluctuate and the efficiency of the discharge may be deteriorated.